1. Field of the Disclosure
The present disclosure relates generally to data processing devices, and more particularly to data processing devices having multiple processor devices.
2. Description of the Related Art
Some data processing devices include multiple processor devices. During a boot process of the data processing device, each processor device is configured before it can access an associated memory device. This configuration process is generally administered by one of the individual processor devices, referred to as a “master bootstrap processor.” The master bootstrap processor configures the other processor devices, which are referred to as “slave processors.” In some data processing devices, the master bootstrap processor communicates configuration information to the slave processors by means of interface circuitry known as an advanced programmable interrupt controller (APIC) that is associated with each processor.
Through the local APIC associated with each processor, an inter-processor interrupt (IPI) can be used to perform a remote read. In order to initiate a remote read, a sequence of memory-mapped reads and writes are performed. This method can be undesirably slow because the master bootstrap processor broadcasts each remote read IPI to all processors in the data processing device and waits for a receipt acknowledgement from each slave processor.